xserver-xorg-video-radeonhd: Changes to 'upstream-experimental'
.gitignore | 1
INSTALL | 142 +
Makefile.am | 8
README | 200 --
autogen.sh | 1
configure.ac | 50
git_version.sh | 65
man/radeonhd.man | 299 ++-
src/AtomBios/includes/CD_Common_Types.h | 2
src/AtomBios/includes/ObjectID.h | 36
src/AtomBios/includes/atombios.h | 786 +++++++--
src/Imakefile | 11
src/Makefile.am | 90 -
src/r5xx_2dregs.h | 288 ---
src/r5xx_3dregs.h | 1352 +++++++++++++++
src/r5xx_accel.c | 374 ++--
src/r5xx_accel.h | 80
src/r5xx_exa.c | 633 ++++++-
src/r5xx_regs.h | 386 ++++
src/r5xx_xaa.c | 856 +++++++--
src/radeon_3d.c | 847 +++++++++
src/radeon_dri.h | 104 +
src/radeon_drm.h | 755 ++++++++
src/radeon_exa_render.c | 2278 ++++++++++++++++++++++++++
src/radeon_textured_videofuncs.c | 810 +++++++++
src/rhd.h | 129 +
src/rhd_atombios.c | 2745 +++++++++++++++++++++++++++++---
src/rhd_atombios.h | 418 ++++
src/rhd_atomcrtc.c | 454 +++++
src/rhd_atomout.c | 996 +++++++++++
src/rhd_atomout.h | 34
src/rhd_atompll.c | 424 ++++
src/rhd_biosscratch.c | 925 ++++++++++
src/rhd_biosscratch.h | 73
src/rhd_card.h | 3
src/rhd_connector.c | 130 -
src/rhd_connector.h | 6
src/rhd_crtc.c | 1115 ++++++++----
src/rhd_crtc.h | 90 -
src/rhd_cs.c | 643 +++++++
src/rhd_cs.h | 166 +
src/rhd_cursor.c | 6
src/rhd_dac.c | 414 +++-
src/rhd_ddia.c | 15
src/rhd_dig.c | 662 ++++++-
src/rhd_dri.c | 1942 ++++++++++++++++++++++
src/rhd_dri.h | 41
src/rhd_driver.c | 990 ++++++++---
src/rhd_edid.c | 2
src/rhd_helper.c | 23
src/rhd_i2c.c | 556 ++++--
src/rhd_i2c.h | 9
src/rhd_id.c | 337 ++-
src/rhd_lut.c | 4
src/rhd_lvtma.c | 216 ++
src/rhd_mc.c | 873 ++++++++--
src/rhd_mc.h | 25
src/rhd_modes.c | 487 ++++-
src/rhd_modes.h | 31
src/rhd_monitor.c | 23
src/rhd_monitor.h | 1
src/rhd_output.c | 11
src/rhd_output.h | 18
src/rhd_pll.c | 228 ++
src/rhd_pll.h | 16
src/rhd_randr.c | 471 ++++-
src/rhd_regs.h | 252 ++
src/rhd_tmds.c | 126 +
src/rhd_vga.c | 80
src/rhd_vga.h | 2
src/rhd_video.c | 812 +++++++++
src/rhd_video.h | 54
utils/conntest/.gitignore | 1
utils/conntest/rhd_conntest.c | 321 +++
utils/conntest/rhd_dump.c | 86 -
75 files changed, 24792 insertions(+), 3148 deletions(-)
New commits:
commit 57aca005c1ede5495f326a98c411d049115cb845
Author: Luc Verhaegen <libv@skynet.be>
Date: Mon Oct 13 20:03:37 2008 +0200
Bump to 1.2.3.
diff --git a/README b/README
index deb2eb1..80c0161 100644
--- a/README
+++ b/README
@@ -82,6 +82,10 @@ Major Changes
Read ChangeLog for a complete list.
+- Version 1.2.3
+
+ - Added Command Submission infrastructure.
+
- Version 1.2.2
- Added DRI support (R5xx and RS6xx).
diff --git a/configure.ac b/configure.ac
index 2817fc2..7ad8829 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2,7 +2,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-radeonhd],
- 1.2.2,
+ 1.2.3,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/radeonhd],
xf86-video-radeonhd)
commit 7aa72401975395aa24a4d2d05d6a29063c99de6a
Author: Luc Verhaegen <libv@skynet.be>
Date: Tue Sep 23 22:39:43 2008 +0200
CS: Xv: clean up memory handling.
This fixes a bug with FB Offset alignment, and, while at it, makes the
whole thing saner.
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index c33f858..247f7c2 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -70,7 +70,9 @@ do { \
# define VAR_PSCRN_PREAMBLE(pScrn) RHDPtr info = RHDPTR(pScrn)
# define THREEDSTATE_PREAMBLE() struct rhdAccel *accel_state = info->accel_state
-# define FB_OFFSET(x) (((char *)(x) - (char *)info->FbBase) + info->FbIntAddress)
+# define BUFFER_PITCH pPriv->src_pitch
+# define FB_BUFFER_OFFSET pPriv->src_offset
+# define FB_PIXMAP_OFFSET(x) (((char *)(x) - (char *)rhdPtr->FbBase) + rhdPtr->FbIntAddress)
# ifdef USE_EXA
# define EXA_ENABLED (info->AccelMethod == RHD_ACCEL_EXA)
@@ -182,7 +184,9 @@ RADEONTilingEnabled(ScrnInfoPtr pScrn, PixmapPtr pPix)
# define VAR_PSCRN_PREAMBLE(pScrn) RHDPtr rhdPtr = RHDPTR(pScrn)
# define THREEDSTATE_PREAMBLE() struct R5xx3D *accel_state = (struct R5xx3D *)rhdPtr->ThreeDPrivate
-# define FB_OFFSET(x) (((char *)(x) - (char *)rhdPtr->FbBase) + rhdPtr->FbIntAddress)
+# define BUFFER_PITCH pPriv->BufferPitch
+# define FB_BUFFER_OFFSET (pPriv->BufferOffset + rhdPtr->FbIntAddress)
+# define FB_PIXMAP_OFFSET(x) (((char *)(x) - (char *)rhdPtr->FbBase) + rhdPtr->FbIntAddress)
# ifdef USE_EXA
# define EXA_ENABLED (rhdPtr->AccelMethod == RHD_ACCEL_EXA)
@@ -225,7 +229,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
} else
#endif
{
- dst_offset = FB_OFFSET(pPixmap->devPrivate.ptr);
+ dst_offset = FB_PIXMAP_OFFSET(pPixmap->devPrivate.ptr);
dst_pitch = pPixmap->devKind;
}
@@ -307,7 +311,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR);
/* pitch is in pixels */
- txpitch = pPriv->src_pitch / 2;
+ txpitch = BUFFER_PITCH / 2;
txpitch -= 1;
if (IS_R500_3D && ((pPriv->w - 1) & 0x800))
@@ -322,7 +326,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
OUT_VIDEO_REG(R300_TX_FORMAT0_0, txformat0);
OUT_VIDEO_REG(R300_TX_FORMAT1_0, txformat1);
OUT_VIDEO_REG(R300_TX_FORMAT2_0, txpitch);
- OUT_VIDEO_REG(R300_TX_OFFSET_0, pPriv->src_offset);
+ OUT_VIDEO_REG(R300_TX_OFFSET_0, FB_BUFFER_OFFSET);
FINISH_VIDEO();
txenable = R300_TEX_0_ENABLE;
diff --git a/src/rhd.h b/src/rhd.h
index 9bc79d2..c8d7818 100644
--- a/src/rhd.h
+++ b/src/rhd.h
@@ -231,8 +231,9 @@ typedef struct RHDRec {
/* Some simplistic memory handling */
#define ALIGN(x,align) (((x)+(align)-1)&~((align)-1))
+#define RHD_FB_ALIGNMENT 0x1000
/* Use this macro to always chew up 4096byte aligned pieces. */
-#define RHD_FB_CHUNK(x) ALIGN((x),0x1000)
+#define RHD_FB_CHUNK(x) ALIGN((x), RHD_FB_ALIGNMENT)
unsigned int FbFreeStart;
unsigned int FbFreeSize;
@@ -305,11 +306,6 @@ typedef struct RHDRec {
/* DRI */
struct rhdDri *dri;
- /* XV */
-#ifdef USE_EXA
- void *adaptor; /* XF86VideoAdaptorPtr */
-#endif
-
/* BIOS Scratch registers */
struct rhdBiosScratchRegisters *BIOSScratch;
diff --git a/src/rhd_video.c b/src/rhd_video.c
index 26416f4..2f953ad 100644
--- a/src/rhd_video.c
+++ b/src/rhd_video.c
@@ -1,5 +1,8 @@
/*
- * Copyright 2008 Alex Deucher
+ * Copyright 2008 Luc Verhaegen <lverhaegen@novell.com>
+ * Copyright 2008 Matthias Hopf <mhopf@novell.com>
+ * Copyright 2008 Egbert Eich <eich@novell.com>
+ * Copyright 2008 Alex Deucher
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -60,117 +63,94 @@
#include "fourcc.h"
#ifdef USE_EXA
-static void
-ATIVideoSave(ScreenPtr pScreen, ExaOffscreenArea *area)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- RHDPtr rhdPtr = RHDPTR(pScrn);
- struct RHDPortPriv *pPriv =
- ((XF86VideoAdaptorPtr)(rhdPtr->adaptor))->pPortPrivates[0].ptr;
-
- if (pPriv->video_memory == area)
- pPriv->video_memory = NULL;
-}
-#endif /* USE_EXA */
-
-/* Allocates memory, either by resizing the allocation pointed to by mem_struct,
- * or by freeing mem_struct (if non-NULL) and allocating a new space. The size
- * is measured in bytes, and the offset from the beginning of card space is
- * returned.
+/*
+ *
*/
+static Bool
+rhdXvAllocateEXA(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv, int size)
+{
+ ExaOffscreenArea *area = pPriv->BufferHandle;
-static CARD32
-rhdAllocateMemory(
- ScrnInfoPtr pScrn,
- void **mem_struct,
- int size
- ){
- ScreenPtr pScreen;
- RHDPtr rhdPtr = RHDPTR(pScrn);
- int offset = 0;
-
- pScreen = screenInfo.screens[pScrn->scrnIndex];
-
-#ifdef USE_EXA
- if (rhdPtr->AccelMethod == RHD_ACCEL_EXA) {
- ExaOffscreenArea *area = *mem_struct;
-
- if (area != NULL) {
- if (area->size >= size)
- return area->offset;
+ if (area && (area->size == size))
+ return TRUE;
- exaOffscreenFree(pScrn->pScreen, area);
- }
+ if (area)
+ exaOffscreenFree(pScrn->pScreen, area);
- area = exaOffscreenAlloc(pScrn->pScreen, size, 64, TRUE, ATIVideoSave,
- NULL);
- *mem_struct = area;
- if (area == NULL)
- return 0;
- offset = area->offset;
+ area = exaOffscreenAlloc(pScrn->pScreen, size, RHD_FB_ALIGNMENT,
+ TRUE, NULL, NULL);
+ if (!area) {
+ pPriv->BufferHandle = NULL;
+ pPriv->BufferOffset = 0;
+ return FALSE;
+ } else {
+ pPriv->BufferHandle = area;
+ pPriv->BufferOffset = area->offset + RHDPTR(pScrn)->FbScanoutStart;
+ return TRUE;
}
+}
#endif /* USE_EXA */
- if (rhdPtr->AccelMethod == RHD_ACCEL_XAA) {
- FBLinearPtr linear = *mem_struct;
- int cpp = pScrn->bitsPerPixel >> 3;
-
- /* XAA allocates in units of pixels at the screen bpp, so adjust size
- * appropriately.
- */
- size = (size + cpp - 1) / cpp;
- if (linear) {
- if (linear->size >= size)
- return linear->offset * cpp;
-
- if (xf86ResizeOffscreenLinear(linear, size))
- return linear->offset * cpp;
+/*
+ *
+ */
+static FBLinearPtr
+rhdXvAllocateXAAHelper(ScreenPtr pScreen, FBLinearPtr linear, int size)
+{
+ if (linear) {
+ if (linear->size == size)
+ return linear;
- xf86FreeOffscreenLinear(linear);
- }
+ if (xf86ResizeOffscreenLinear(linear, size))
+ return linear;
- linear = xf86AllocateOffscreenLinear(pScreen, size, 16,
- NULL, NULL, NULL);
- *mem_struct = linear;
+ xf86FreeOffscreenLinear(linear);
+ }
- if (!linear) {
- int max_size;
+ linear = xf86AllocateOffscreenLinear(pScreen, size, 1,
+ NULL, NULL, NULL);
- xf86QueryLargestOffscreenLinear(pScreen, &max_size, 16,
- PRIORITY_EXTREME);
+ if (!linear) {
+ int max_size;
- if (max_size < size)
- return 0;
+ xf86QueryLargestOffscreenLinear(pScreen, &max_size, 1,
+ PRIORITY_EXTREME);
+ if (max_size < size)
+ return NULL;
- xf86PurgeUnlockedOffscreenAreas(pScreen);
- linear =
- xf86AllocateOffscreenLinear(pScreen, size, 16, NULL, NULL, NULL);
- *mem_struct = linear;
- if (!linear)
- return 0;
- }
- offset = linear->offset * cpp;
+ xf86PurgeUnlockedOffscreenAreas(pScreen);
+ linear = xf86AllocateOffscreenLinear(pScreen, size, 1,
+ NULL, NULL, NULL);
}
- return offset;
+ return linear;
}
/*
*
*/
-void
-rhdFreeMemory(ScrnInfoPtr pScrn, void *mem_struct)
+static Bool
+rhdXvAllocateXAA(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv, int size)
{
- if (mem_struct) {
- RHDPtr rhdPtr = RHDPTR(pScrn);
+ int cpp = pScrn->bitsPerPixel >> 3;
+ FBLinearPtr linear;
-#ifdef USE_EXA
- if (rhdPtr->AccelMethod == RHD_ACCEL_EXA)
- exaOffscreenFree(pScrn->pScreen, (ExaOffscreenArea *) mem_struct);
-#endif /* USE_EXA */
+ /* We need to do FB alignment manually */
+ size += RHD_FB_ALIGNMENT - 1;
+
+ /* XAA allocates in units of pixels */
+ size = (size + cpp - 1) / cpp;
- if (rhdPtr->AccelMethod == RHD_ACCEL_XAA)
- xf86FreeOffscreenLinear((FBLinearPtr) mem_struct);
+ linear = rhdXvAllocateXAAHelper(pScrn->pScreen, pPriv->BufferHandle, size);
+ if (!linear) {
+ pPriv->BufferHandle = NULL;
+ pPriv->BufferOffset = 0;
+ return FALSE;
+ } else {
+ pPriv->BufferHandle = linear;
+ pPriv->BufferOffset = RHDPTR(pScrn)->FbScanoutStart +
+ RHD_FB_CHUNK(linear->offset * cpp + RHD_FB_ALIGNMENT - 1);
+ return TRUE;
}
}
@@ -180,6 +160,28 @@ rhdFreeMemory(ScrnInfoPtr pScrn, void *mem_struct)
static void
rhdStopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup)
{
+ if (cleanup) {
+ struct RHDPortPriv *pPriv = data;
+
+ switch (RHDPTR(pScrn)->AccelMethod) {
+#ifdef USE_EXA
+ case RHD_ACCEL_EXA:
+ exaOffscreenFree(pScrn->pScreen,
+ (ExaOffscreenArea *) pPriv->BufferHandle);
+ break;
+#endif /* USE_EXA */
+ case RHD_ACCEL_XAA:
+ xf86FreeOffscreenLinear((FBLinearPtr) pPriv->BufferHandle);
+ break;
+ default:
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "%s: cannot de-allocate memory!\n", __func__);
+ break;
+ }
+
+ pPriv->BufferHandle = NULL;
+ pPriv->BufferOffset = 0;
+ }
}
/*
@@ -388,6 +390,9 @@ R5xxXvCopyPacked(RHDPtr rhdPtr, CARD8 *src, CARD8 *dst,
#endif
}
+/*
+ *
+ */
static void
R5xxXvCopyPlanarToPacked(CARD8 *dst, CARD16 dstPitch,
CARD8 *src1, CARD16 src1Pitch,
@@ -483,6 +488,9 @@ R5xxXvCopyPlanarDMA(RHDPtr rhdPtr, CARD8 *src1, CARD8 *src2, CARD8 *src3,
RHDCSFlush(CS);
}
+/*
+ *
+ */
static void
R5xxXvCopyPlanar(RHDPtr rhdPtr, CARD8 *src1, CARD8 *src2, CARD8 *src3,
CARD8 *dst1, CARD16 srcPitch, CARD16 srcPitch2,
@@ -524,7 +532,6 @@ rhdPutImageTextured(ScrnInfoPtr pScrn,
RHDPtr rhdPtr = RHDPTR(pScrn);
struct RHDPortPriv *pPriv = data;
CARD8 *FBBuf;
- int dstPitch, size;
/*
* First, make sure we can render to the drawable.
@@ -557,44 +564,40 @@ rhdPutImageTextured(ScrnInfoPtr pScrn,
pPriv->pDraw = pDraw;
- /*
- * Now, find out whether we have enough memory available.
- */
- dstPitch = width << 1;
-
+ /* The upload blit only supports multiples of 64 bytes */
if (rhdPtr->CS->Type == RHD_CS_CPDMA)
- /* The upload blit only supports multiples of 64 bytes */
- dstPitch = (dstPitch + 63) & ~63;
+ pPriv->BufferPitch = ALIGN(2 * width, 64);
else
- dstPitch = (dstPitch + 15) & ~15;
+ pPriv->BufferPitch = ALIGN(2 * width, 16);
- size = dstPitch * height;
-
- if (pPriv->video_memory && (size != pPriv->size)) {
- rhdFreeMemory(pScrn, pPriv->video_memory);
- pPriv->video_memory = NULL;
- pPriv->size = 0;
+ /*
+ * Now, find out whether we have enough memory available.
+ */
+ switch (rhdPtr->AccelMethod) {
+#ifdef USE_EXA
+ case RHD_ACCEL_EXA:
+ rhdXvAllocateEXA(pScrn, pPriv, 2 * pPriv->BufferPitch * height);
+ break;
+#endif /* USE_EXA */
+ case RHD_ACCEL_XAA:
+ rhdXvAllocateXAA(pScrn, pPriv, 2 * pPriv->BufferPitch * height);
+ break;
+ default:
+ pPriv->BufferHandle = NULL;
+ pPriv->BufferOffset = 0;
+ break;
}
- if (!pPriv->video_memory)
- pPriv->video_offset =
- rhdAllocateMemory(pScrn, &pPriv->video_memory, size * 2);
-
- if (!pPriv->video_offset || !pPriv->video_memory) {
- pPriv->size = 0;
+ if (!pPriv->BufferHandle) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"%s: Failed to allocate framebuffer memory.\n", __func__);
return BadAlloc;
}
- pPriv->size = size;
-
/*
* Now copy the buffer to the framebuffer, and convert to planar when necessary.
*/
- pPriv->src_offset = pPriv->video_offset + rhdPtr->FbIntAddress + rhdPtr->FbScanoutStart;
- FBBuf = ((CARD8 *)rhdPtr->FbBase + rhdPtr->FbScanoutStart + pPriv->video_offset);
- pPriv->src_pitch = dstPitch;
+ FBBuf = (CARD8 *)rhdPtr->FbBase + pPriv->BufferOffset;
switch(id) {
case FOURCC_YV12:
@@ -607,18 +610,26 @@ rhdPutImageTextured(ScrnInfoPtr pScrn,
if (id == FOURCC_YV12) {
if (rhdPtr->CS->Type == RHD_CS_CPDMA)
- R5xxXvCopyPlanarDMA(rhdPtr, buf, buf + s2offset, buf + s3offset,
- FBBuf, srcPitch, srcPitch2, dstPitch, height, width);
+ R5xxXvCopyPlanarDMA(rhdPtr, buf, buf + s2offset,
+ buf + s3offset, FBBuf, srcPitch,
+ srcPitch2, pPriv->BufferPitch,
+ height, width);
else
- R5xxXvCopyPlanar(rhdPtr, buf, buf + s2offset, buf + s3offset,
- FBBuf, srcPitch, srcPitch2, dstPitch, height, width);
+ R5xxXvCopyPlanar(rhdPtr, buf, buf + s2offset,
+ buf + s3offset, FBBuf, srcPitch,
+ srcPitch2, pPriv->BufferPitch,
+ height, width);
} else {
if (rhdPtr->CS->Type == RHD_CS_CPDMA)
- R5xxXvCopyPlanarDMA(rhdPtr, buf, buf + s3offset, buf + s2offset,
- FBBuf, srcPitch, srcPitch2, dstPitch, height, width);
+ R5xxXvCopyPlanarDMA(rhdPtr, buf, buf + s3offset,
+ buf + s2offset, FBBuf, srcPitch,
+ srcPitch2, pPriv->BufferPitch,
+ height, width);
else
- R5xxXvCopyPlanar(rhdPtr, buf, buf + s3offset, buf + s2offset,
- FBBuf, srcPitch, srcPitch2, dstPitch, height, width);
+ R5xxXvCopyPlanar(rhdPtr, buf, buf + s3offset,
+ buf + s2offset, FBBuf, srcPitch,
+ srcPitch2, pPriv->BufferPitch,
+ height, width);
}
}
break;
@@ -626,9 +637,11 @@ rhdPutImageTextured(ScrnInfoPtr pScrn,
case FOURCC_YUY2:
default:
if (rhdPtr->CS->Type == RHD_CS_CPDMA)
- R5xxXvCopyPackedDMA(rhdPtr, buf, FBBuf, 2 * width, dstPitch, height);
+ R5xxXvCopyPackedDMA(rhdPtr, buf, FBBuf, 2 * width,
+ pPriv->BufferPitch, height);
else
- R5xxXvCopyPacked(rhdPtr, buf, FBBuf, 2 * width, dstPitch, height);
+ R5xxXvCopyPacked(rhdPtr, buf, FBBuf, 2 * width,
+ pPriv->BufferPitch, height);
break;
}
@@ -745,11 +758,10 @@ rhdSetupImageTexturedVideo(ScreenPtr pScreen)
/* gotta uninit this someplace, XXX: shouldn't be necessary for textured */
REGION_NULL(pScreen, &pPriv->clip);
+
adapt->pPortPrivates[i].ptr = (pointer) (pPriv);
}
-#ifdef USE_EXA
- rhdPtr->adaptor = adapt; /* this is only needed for exaOffscreenAlloc */
-#endif
+
return adapt;
}
diff --git a/src/rhd_video.h b/src/rhd_video.h
index f14cd50..0c87ae9 100644
--- a/src/rhd_video.h
+++ b/src/rhd_video.h
@@ -1,20 +1,41 @@
-#ifndef __RADEON_VIDEO_H__
-#define __RADEON_VIDEO_H__
+/*
+ * Copyright 2008 Luc Verhaegen <lverhaegen@novell.com>
+ * Copyright 2008 Matthias Hopf <mhopf@novell.com>
+ * Copyright 2008 Egbert Eich <eich@novell.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef _RHD_VIDEO_H
+#define _RHD_VIDEO_H
/* Xvideo port struct */
struct RHDPortPriv {
- RegionRec clip;
-
- int size;
- void *video_memory;
- int video_offset;
-
- /* textured video */
DrawablePtr pDraw;
PixmapPtr pPixmap;
- CARD32 src_offset;
- CARD32 src_pitch;
+ RegionRec clip;
+
+ void *BufferHandle;
+ CARD32 BufferOffset;
+ CARD32 BufferPitch;
int id;
int src_w;
@@ -30,4 +51,4 @@ struct RHDPortPriv {
extern void RHDRADEONDisplayTexturedVideo(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv);
extern void RHDInitVideo(ScreenPtr pScreen);
-#endif
+#endif /* _RHD_VIDEO_H */
commit 13a6774a9394adcc69e6ec298c1254c0e077aab1
Author: Luc Verhaegen <libv@skynet.be>
Date: Tue Sep 23 18:45:53 2008 +0200
CS: Port over textured video support.
diff --git a/src/Makefile.am b/src/Makefile.am
index 8675daa..1230e6c 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -66,7 +66,10 @@ radeonhd_drv_la_SOURCES = \
r5xx_xaa.c \
r5xx_regs.h \
r5xx_3dregs.h \
- radeon_3d.c
+ radeon_3d.c \
+ rhd_video.c \
+ rhd_video.h \
+ radeon_textured_videofuncs.c
nodist_radeonhd_drv_la_SOURCES = \
git_version.h
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
deleted file mode 100644
index ec9794a..0000000
--- a/src/radeon_accel.c
+++ /dev/null
@@ -1,892 +0,0 @@
-/*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
- * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/*
- * Authors:
- * Kevin E. Martin <martin@xfree86.org>
- * Rickard E. Faith <faith@valinux.com>
- * Alan Hourihane <alanh@fairlite.demon.co.uk>
- *
- * Credits:
- *
- * Thanks to Ani Joshi <ajoshi@shell.unixbox.com> for providing source
- * code to his Radeon driver. Portions of this file are based on the
- * initialization code for that driver.
- *
- * References:
- *
- * !!!! FIXME !!!!
- * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
- * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
- * 1999.
- *
- * RAGE 128 Software Development Manual (Technical Reference Manual P/N
- * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
- *
- */
-
-#include <errno.h>
-#include <string.h>
- /* Driver data structures */
-#include "xf86.h"
-
-#ifdef USE_XAA
-#include "xaa.h"
-#endif
-#ifdef USE_EXA
-#include "exa.h"
-#endif
-#ifdef USE_DRI
-#define _XF86DRI_SERVER_
-#include "dri.h"
-#include "GL/glxint.h"
-#endif
-
-#include "rhd.h"
-#ifdef USE_DRI
-# include "rhd_dri.h"
-# include "rhd_cp.h"
-#else
-# define uint8_t CARD8
-# define uint16_t CARD16
-# define uint32_t CARD32
-#endif
-
-#include "radeon_accel.h"
-
-#include "radeon_reg.h"
-#ifdef USE_DRI
-#define _XF86DRI_SERVER_
-#include "radeon_dri.h"
-#include "radeon_drm.h"
-#include "sarea.h"
-#endif
- /* X and server generic header files */
-
-/* Compute log base 2 of val */
-int RADEONMinBits(int val)
-{
- int bits;
-
- if (!val) return 1;
- for (bits = 0; val; val >>= 1, ++bits);
- return bits;
-}
-
-/* The FIFO has 64 slots. This routines waits until at least `entries'
- * of these slots are empty.
- */
-void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
-{
- RHDPtr info = RHDPTR(pScrn);
- int i;
-
- for (;;) {
- for (i = 0; i < RADEON_TIMEOUT; i++) {
- info->accel_state->fifo_slots =
- RHDRegRead(info, RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK;
- if (info->accel_state->fifo_slots >= entries) return;
- }
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "FIFO timed out: %u entries, stat=0x%08x\n",
- (unsigned int)RHDRegRead(info, RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
- (unsigned int)RHDRegRead(info, RADEON_RBBM_STATUS));
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "FIFO timed out, resetting engine...\n");
- RADEONEngineReset(pScrn);
- RADEONEngineRestore(pScrn);
-#ifdef USE_DRI
- if (info->directRenderingEnabled) {
- RADEONCP_RESET(pScrn, info);
- RADEONCP_START(pScrn, info);
- }
-#endif
- }
-}
-
-/* Flush all dirty data in the Pixel Cache to memory */
-void RADEONEngineFlush(ScrnInfoPtr pScrn)
-{
- RHDPtr info = RHDPTR(pScrn);
- int i;
-
- RHDRegMask(pScrn, R300_DSTCACHE_CTLSTAT,
- R300_RB2D_DC_FLUSH_ALL, R300_RB2D_DC_FLUSH_ALL);
- for (i = 0; i < RADEON_TIMEOUT; i++) {
- if (!(RHDRegRead(info, R300_DSTCACHE_CTLSTAT) & R300_RB2D_DC_BUSY))
- break;
- }
- if (i == RADEON_TIMEOUT) {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "DC flush timeout: %x\n",
- (unsigned int)RHDRegRead(info, R300_DSTCACHE_CTLSTAT));
- }
-}
-
-/* Reset graphics card to known state */
-void RADEONEngineReset(ScrnInfoPtr pScrn)
-{
- RHDPtr info = RHDPTR(pScrn);
- uint32_t rbbm_soft_reset;
- uint32_t host_path_cntl;
- uint32_t tmp;
-
- /* The following RBBM_SOFT_RESET sequence can help un-wedge
- * an R300 after the command processor got stuck.
- */
- rbbm_soft_reset = RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
- RHDRegWrite(info, RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
- RADEON_SOFT_RESET_CP |
- RADEON_SOFT_RESET_HI |
- RADEON_SOFT_RESET_SE |
- RADEON_SOFT_RESET_RE |
- RADEON_SOFT_RESET_PP |
- RADEON_SOFT_RESET_E2 |
- RADEON_SOFT_RESET_RB));
- RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
- RHDRegWrite(info, RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset & (uint32_t)
- ~(RADEON_SOFT_RESET_CP |
- RADEON_SOFT_RESET_HI |
- RADEON_SOFT_RESET_SE |
- RADEON_SOFT_RESET_RE |
- RADEON_SOFT_RESET_PP |
- RADEON_SOFT_RESET_E2 |
- RADEON_SOFT_RESET_RB)));
- RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
- RHDRegWrite(info, RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
- RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
-
- RADEONEngineFlush(pScrn);
-
-
- /* Soft resetting HDP thru RBBM_SOFT_RESET register can cause some
- * unexpected behaviour on some machines. Here we use
- * RADEON_HOST_PATH_CNTL to reset it.
- */
- host_path_cntl = RHDRegRead(info, RADEON_HOST_PATH_CNTL);
- rbbm_soft_reset = RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
-
-
-
- RHDRegWrite(info, RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
- RADEON_SOFT_RESET_CP |
- RADEON_SOFT_RESET_HI |
- RADEON_SOFT_RESET_E2));
- RHDRegRead(info, RADEON_RBBM_SOFT_RESET);
- RHDRegWrite(info, RADEON_RBBM_SOFT_RESET, 0);
- tmp = RHDRegRead(info, RADEON_RB3D_DSTCACHE_MODE);
- RHDRegWrite(info, RADEON_RB3D_DSTCACHE_MODE, tmp | (1 << 17)); /* FIXME */
-
- RHDRegWrite(info, RADEON_HOST_PATH_CNTL, host_path_cntl | RADEON_HDP_SOFT_RESET);
- RHDRegRead(info, RADEON_HOST_PATH_CNTL);
- RHDRegWrite(info, RADEON_HOST_PATH_CNTL, host_path_cntl);
-
-}
-
-/* Restore the acceleration hardware to its previous state */
-void RADEONEngineRestore(ScrnInfoPtr pScrn)
-{
- RHDPtr info = RHDPTR(pScrn);
-
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "EngineRestore (%d/%d)\n",
- PIXEL_CODE(pScrn),
- pScrn->bitsPerPixel);
-
- /* Setup engine location. This shouldn't be necessary since we
- * set them appropriately before any accel ops, but let's avoid
- * random bogus DMA in case we inadvertently trigger the engine
- * in the wrong place (happened).
- */
- RADEONWaitForFifo(pScrn, 2);
- RHDRegWrite(info, RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset);
- RHDRegWrite(info, RADEON_SRC_PITCH_OFFSET, info->accel_state->dst_pitch_offset);
-
- RADEONWaitForFifo(pScrn, 1);
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- RHDRegMask(pScrn, RADEON_DP_DATATYPE,
- RADEON_HOST_BIG_ENDIAN_EN, RADEON_HOST_BIG_ENDIAN_EN);
-#else
- RHDRegMask(pScrn, RADEON_DP_DATATYPE, 0, RADEON_HOST_BIG_ENDIAN_EN);
-#endif
-
- /* Restore SURFACE_CNTL */
- RHDRegWrite(info, RADEON_SURFACE_CNTL, info->accel_state->surface_cntl);
-
- RADEONWaitForFifo(pScrn, 1);
- RHDRegWrite(info, RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX
- | RADEON_DEFAULT_SC_BOTTOM_MAX));
- RADEONWaitForFifo(pScrn, 1);
- RHDRegWrite(info, RADEON_DP_GUI_MASTER_CNTL, (info->accel_state->dp_gui_master_cntl
- | RADEON_GMC_BRUSH_SOLID_COLOR
- | RADEON_GMC_SRC_DATATYPE_COLOR));
-
- RADEONWaitForFifo(pScrn, 5);
- RHDRegWrite(info, RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff);
- RHDRegWrite(info, RADEON_DP_BRUSH_BKGD_CLR, 0x00000000);
- RHDRegWrite(info, RADEON_DP_SRC_FRGD_CLR, 0xffffffff);
- RHDRegWrite(info, RADEON_DP_SRC_BKGD_CLR, 0x00000000);
- RHDRegWrite(info, RADEON_DP_WRITE_MASK, 0xffffffff);
-
- RADEONWaitForIdleMMIO(pScrn);
-
- info->accel_state->XHas3DEngineState = FALSE;
-}
-
-/* Initialize the acceleration hardware */
-void RADEONEngineInit(ScrnInfoPtr pScrn)
-{
- RHDPtr info = RHDPTR(pScrn);
- int pixel_code = PIXEL_CODE(pScrn);
- uint32_t gb_tile_config;
- int pitch;
- int datatype;
-
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "EngineInit (%d/%d)\n",
- PIXEL_CODE(pScrn),
- pScrn->bitsPerPixel);
-
-#ifdef USE_DRI
- if (info->directRenderingEnabled) {
- struct drm_radeon_getparam np;
- int num_pipes;
-
- memset(&np, 0, sizeof(np));
- np.param = RADEON_PARAM_NUM_GB_PIPES;
- np.value = &num_pipes;
-
- if (drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GETPARAM, &np,
- sizeof(np)) < 0) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Failed to determine num pipes from DRM, falling back to "
- "manual look-up!\n");
- info->accel_state->num_gb_pipes = 0;
- } else {
- info->accel_state->num_gb_pipes = num_pipes;
- }
- }
-#endif
-
- if (info->accel_state->num_gb_pipes == 0) {
- uint32_t gb_pipe_sel = RHDRegRead(info, R400_GB_PIPE_SELECT);
-
- info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
- if (IS_R500_3D)
- RHDWritePLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "num pipes is %d\n", info->accel_state->num_gb_pipes);
-
- gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
-
- switch(info->accel_state->num_gb_pipes) {
- case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
- case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
- case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
- default:
- case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
- }
-
- RHDRegWrite(info, R300_GB_TILE_CONFIG, gb_tile_config);
- RHDRegWrite(info, RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
- RHDRegWrite(info, R300_DST_PIPE_CONFIG, RHDRegRead(info, R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
Reply to: